VLSI systems/integrated circuits design, design for test (DFT), verification, test, defect/fault tolerance, design Reliability of emerging nanotechnology architectures, embedded systems design, FPGA, and asynchronous paradigms Secured and trustable integrated circuits, On-chip signal integrity, FPGA, CAD tools, and wireless sensor networks.
Ph.D. Electrical Engineering, Colorado State University
M.S. Electrical Engineering, University of Baghdad, Iraq
B.S. Electrical Engineering, University of Baghdad, Iraq
F. A. Parsan, S. Smith, and W. K. Al-Assadi, “Design for Testability of Sleep Convention Logic,” IEEE Transactions on VLSI Systems, Transactions on Very Large Scale Integration (VLSI) Systems, Volume: 24, Issue: 2, pp. 743-753, 2016.
F. A. Parsan, W. K. Al-Assadi and S, Smith, “Gate Mapping Automation for Asynchronous NULL Convention Logic Circuits,” IEEE Transactions on VLSI Systems, vol. 22, no. 1, pp. 99-112, January 2014.
P. Varadharajan, W. K. Al-Assadi, S. F. Alam, and S. C. Scott, “Quantum-Dot Cellular Automata of Asynchronous Null Convention Logic Multiplier Design,” in IEEE 56th Int. Midwest Symposium on Circuits and Systems, Columbus, OH, 2013.See More
For a complete list of publications, please see CV.
S. Smith, W. K. Al-Assadi and J. Di, "Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum," IEEE Transactions on Education, vol. 53, issue 3 pp. 349-357, 2010.
W. K. Al-Assadi and S. Kakarla, “Design for Test of Asynchronous NULL Convention Logic (NCL) Circuits,” Journal of Electronic Testing: Theory and Applications (JETTA), vol. 25, Feb. 2009.
W. K. Al-Assadi and S. Kakarla, “Design for Test of Asynchronous NULL Convention Logic (NCL) Circuits,” IEEE Int. Test Conference (ITC 2008), pp. 1-9, Oct. 2008.
V. Satagopan, B. Bhaskaran, W.K. Al-Assadi, Smith, S.C. Smith and S. Kakarla, “DFT Techniques and Automation for Asynchronous NULL Conventional Logic Circuits,” IEEE Transactions on VLSI Systems: Special Issue on System on Chip Integration, Vol. 15/10, pp. 1155-1159, October 2007.
EG 231 Introduction to Ethics and Economics
EE 263 Digital Logic Design
EE 227 Circuits and Devices Lab
EE 264 Microprocessor Systems and Interfacing
EE 268 Digital Logic Design Lab
EE 454/554 Computer Architecture
EE 469/569 Signal Integrity
EE 534 VLSI Systems Design
EE 560 Advanced Computer Architecture