TBD
| HW Set | Assignment | Date Assigned | Date Due |
| 1 | Vt calculation -- P3.1 | 30-Aug | 8-Sep |
| 2 | Inverter in Microwind | 8-Sep | 22-Sep |
| 3 | Capacitance -- P3.17 | 15-Sep | 29-Sep |
| 4 | Noise Margin & Prop Delay | 1-Oct | 11-Oct |
| Project 1 | Static CMOS Gate | 20-Oct | 3-Nov |
| Project 2 | Dynamic CMOS Gate | 20-Oct | 17-Nov |
| Project 3 | MSI Layout | 20-Oct | 6-Dec |
We will be using the Cadence software package. More details as the installation proceeds...
In the meantime, you can download Microwind here.
This semester (Fall 2010), students will divide into groups of 3-4 and complete three projects per group. Each group will give a brief presentation to the class on their final design (Project 3). For example, Group 3 will design a static CMOS 2-input NAND gate for project 1, a dynamic 2-input NAND for project 2, and a 1-bit adder cell for the final project.
See Project Guidelines for important information about the design requirements and report formats.
| No. | VLSI Project 1: | VLSI Project 2: | VLSI Project 3: | Who is in the lab group? | |||
| 1 | 2-input NOR | Dynamic Logic Version of the Same Gate | D Flip-Flop with Async Reset | Adhikari, Anish | Aryal, Surya P. | Thimmaraju, Vamsi Mohan | |
| 2 | 2-input OR | 2:4 Decoder | Kudikala, Harish | Illa, Shanmuka S. | Varadharajan, Pragadesh | ||
| 3 | 2-input NAND | 1-bit full adder cell | Andela, Ramesh Reddy | Adem, Srinivas Reddy | Siddam, Vikas | ||
| 4 | 2-input AND | 5-stage ring oscillator | Patchava, Swapna | Ravva, Dinesh | Palla, Anirudh | ||
| 5 | 3-input NOR | JK Flip-Flop | Kundur, Sridhama | Naik, Abhishek | Nori, Balasubramanyam | ||
| 6 | 3-input OR | 6-input SOP (ABC + DEF) | Bandreddy, Sai K. | Kamaraju, Narsing Rao | Orsu, Swathi P. | ||
| 7 | 3-input NAND | D Flip-Flop with Load Enable | Kurakula, Gopinath | Gunda, Akhilesh | Pyapali, Karthik C. | ||
| 8 | 3-input AND | 4:1 Multiplexer | Angajala, Syamala Gouri | Bellamkonda, Nagina | Katakam, Sumith Reddy | Annamaneni, Sandeep Rao | |
| Due 11/3 | Due 11/17 | Due 12/6 | |||||
| Test | Date |
| Test 1 | 22-Sep |
| Test 2 | 15-Oct |
| Test 3 | 15-Nov |
| Final | 13-Dec 8:00 AM |
Java applet visualization aids from the University of Buffalo: These help illustrate some of the things we discuss in class, such as chip fabrication.
Symbolic Integration website